document number: MMA3202d rev 4, 11/2006 freescale semiconductor technical data ? freescale semiconductor, in c., 2006. all rights reserved. surface mount micromachined accelerometer the MMA3202 series of dual axis (x and y) silicon capacitive, micromachined accelerometers features signal conditioning, a 4-pole low pass filter and temperature compensation and separate out puts for the two axes. zero-g offset full scale span and filter cut-off are factory set and require no external devices. a full system self-test capability verifies system functionality. features ? sensitivity in two separate axes: 100g x-axis and 50g y-axis ? integral signal conditioning ? linear output ? ratiometric performance ? 4th order bessel filter preserves pulse shape integrity ? calibrated self-test ? low voltage detect, clock monitor, and eprom parity check status ? transducer hermetically sealed at wafer level for superior reliability ? robust design, high shocks survivability typical applications ? vibration monitoring and recording ? impact monitoring ? appliance control ? mechanical bearing monitoring ? computer hard drive protection ? computer mouse and joysticks ? virtual reality input devices ? sports diagnostic devices and systems ordering information device temperature range case no. package MMA3202d ? 40 to +125c 475a-02 soic-20 MMA3202dr2 ? 40 to +125c 475a-02 soic-20, tape & reel MMA3202eg ? 40 to +125c 475a-02 soic-20 MMA3202egr2 ? 40 to +125c 475a-02 soic-20, tape & reel MMA3202 MMA3202d: x-y axis sensitivity micromachined accelerometer 100/50g d suffix eg suffix (pb-free) 20-lead soic case 475a-02 g-cell sensor integrator gain filter temp self-test control logic & eprom trim circuits clock generator oscillator v dd x out v ss st status av dd y out 14 15 16 17 18 19 20 8 7 6 5 4 3 2 1 13 n/c n/c n/c st x out status v dd gnd n/c n/c n/c n/c n/c n/c n/c 12 10 9 11 v ss av dd n/c y out n/c figure 1. simplified acceleromet er functional block diagram figure 2. pin connections
sensors 2 freescale semiconductor MMA3202d electro static discharge (esd) warning: this device is se nsitive to electrostatic discharge. although the accelerometers contain internal 2 kv esd protection circuitry, extra pr ecaution must be taken by the user to protect the chip from esd. a charge of over 2000 volts can accumulate on the human body or associated test equipment. a charge of this magnitude can alter the performance or cause failure of the chip. when handling the accelerometer, proper esd precautions should be followed to avoid exposing the device to discharges which may be detrimental to its performance. table 1. maximum ratings (maximum ratings are the limits to which the device can be exposed without causing permanent damage.) rating symbol value unit powered acceleration (all axes) g pd 1500 g unpowered acceleration (all axes) g upd 2000 g supply voltage v dd ?0.3 to +7.0 v drop test (1) 1. dropped onto concrete surface from any axis. d drop 1.2 m storage temperature range t stg ?40 to +125 c
sensors freescale semiconductor 3 MMA3202d table 2. operating characteristics (unless otherwise noted: ?40c t a +105c, 4.75 v dd 5.25, acceleration = 0g, loaded output.) (1) 1. for a loaded output the measurements are observed after an rc filter consisting of a 1 k ? resistor and a 0.01 f capacitor to ground. characteristic symbol min typ max unit operating range (2) supply voltage (3) supply current operating temperature range acceleration range x-axis acceleration range y-axis 2. these limits define the range of operation fo r which the part will meet specification. 3. within the supply range of 4.75 and 5.25 volts, the device operat es as a fully calibrated linear accelerometer. beyond these supply limits the device may operate as a linear device but is not guaranteed to be in calibration. v dd i dd t a g fs g fs 4.75 6 ?40 ? ? 5.00 8 ? 112.5 56.3 5.25 10 +125 ? ? v ma c g g output signal zero g (t a = 25c, v dd = 5.0 v) (4) zero g sensitivity x-axis (t a = 25c, v dd = 5.0 v) (5) sensitivity y-axis (t a = 25c, v dd = 5.0 v) sensitivity x-axis sensitivity y-axis bandwidth response nonlinearity 4. the device can measure both + and ? acceleration. with no input acceleration the output is at midsupply. for positive acceler ation the output will increase above v dd /2 and for negative acceleration the output will decrease below v dd /2. 5. the device is calibrated at 20g. v off v off,v s s s v s v f ?3db nl out 2.35 0.46 v dd 19 38 3.72 7.44 360 ?1.0 2.5 0.50 v dd 20 40 4 8 400 ? 2.65 0.54 v dd 21 42 4.28 8.56 440 +1.0 v v mv/g mv/g mv/g/v mv/g/v hz % fso noise rms (.01 hz ? 1 khz) power spectral density clock noise (without rc load on output) (6) 6. at clock frequency ? 70 khz. n rms n psd n clk ? ? ? ? 110 2.0 2.8 ? ? mvrms v/(hz 1/2 ) mvpk self-test output response input low input high input loading (7) response time (8) 7. the digital input pin has an internal pull-down current source to prevent inadvertent self test initiation due to external bo ard level leakages. 8. time for the output to reach 90% of its final value after a self-test is initiated. g st v il v ih i in t st 9.6 v ss 0.7 v dd ?30 ? 12 ? ? ?100 2.0 14.4 0.3 v dd v dd ?300 ? g v v a ms status (9) (10) output low (i load = 100 a) output high (i load = 100 a) 9. the status pin output is not valid following power-up unti l at least one rising edge has been applied to the self-test pin. t he status pin is high whenever the self-test input is high, as a means to check the connec tivity of the self-test and status pins in the applica tion. 10. the status pin output latches high if a low voltage detection or clock frequency failure occurs, or the eprom parity changes to odd. the status pin can be reset low if the self-test pi n is pulsed with a high input for at least 100 s, unless a fault condition continues to exist. v ol v oh ? v dd ? 0.8 ? ? 0.4 ? v v minimum supply voltage (lvd trip) v lvd 2.7 3.25 4.0 v clock monitor fail detection frequency f min 50 ? 260 khz output stage performance electrical saturati on recovery time (11) full scale output range (i out = 200 a) capacitive load drive (12) output impedence 11. time for amplifiers to recover after an acceleration signal causing them to saturate 12. preserves phase margin (60) to guarantee output amplifier stability. t delay v fso c l z o ? 0.25 ? ? 0.2 ? ? 300 ? v dd ?0.25 100 ? ms v pf ? mechanical characteristics transverse sensitivity (13) package resonance 13. a measure of the device's ability to reject an accele ration applied 90 from the true axis of sensitivity. v xz,yz f pkg ? ? ? 10 5.0 ? % fso khz
sensors 4 freescale semiconductor MMA3202d principle of operation the freescale semiconductor, inc. accelerometer is a surface-micromachined integrated-circuit accelerometer. the device consists of a surface micromachined capacitive sensing cell (g -cell) and a cmos signal conditioning asic contained in a single integrated circuit package. the sensing element is sealed hermetically at the wafer level using a bulk micromachined ?cap'' wafer. the g-cell is a mechanical structure formed from semiconductor materials (polysilicon) using semiconductor processes (masking and etching). it can be modeled as a set of beams attached to a movable central mass that move between fixed beams. the movable beams can be deflected from their rest position by subjecting the system to an acceleration ( figure 3 ). as the beams attached to the central mass move, the distance from them to the fixed beams on one side will increase by the same amount that the distance to the fixed beams on the other side decreases. the change in distance is a measure of acceleration. the g-cell beams form two back-to-back capacitors ( figure 3 ). as the central mass moves with acceleration, the distance between the beams change and each capacitor's value will change, (c = na /d). where a is the area of the facing side of the beam, is the dielectric constant, d is the distance between the beams, and n is the number of beams. the x-y device contains two st ructures at right angles to each other. the cmos asic uses switched capacitor techniques to measure the g-cell capacitors and extract the acceleration data from the difference between the two capacitors. the asic also signal conditions and filters (switched capacitor) the signal, providing a high level output voltage that is ratiometric and proportional to acceleration. figure 3. simpli fied transducer physical model special features filtering the freescale semiconductor, inc. accelerometers contain an onboard 4-pole switched capacitor filter. a bessel implementation is used because it provides a maximally flat delay response (linear phase) thus preserving pulse shape integrity. because the filter is realized using switched capacitor techniques, there is no requirement for external passive components (resistors and capacitors) to set the cut- off frequency. self-test the sensor provides a self-test feature that allows the verification of the mechanical and electrical integrity of the accelerometer at any time before or after installation. this feature is critical in applicatio ns such as automotive airbag systems where system integrity must be ensured over the life of the vehicle. a fourth ?plate'' is used in the g-cell as a self- test plate. when the user applies a logic high input to the self- test pin, a calibrated potential is applied across the self-test plate and the moveable plate. the resulting electrostatic force (fe = 1 / 2 av 2 /d 2 ) causes the center pl ate to deflect. the resultant deflection is measured by the accelerometer's control asic and a proportional output voltage results. this procedure assures that both the mechanical (g-cell) and electronic sections of the accelerometer are functioning. ratiometricity ratiometricity simply means that the output offset voltage and sensitivity will scale linearly with applied supply voltage. that is, as you increase suppl y voltage the sensitivity and offset increase linearly; as su pply voltage decreases, offset and sensitivity decrease linearly. this is a key feature when interfacing to a microcontrolle r or an a/d converter because it provides system level cancella tion of supply induced errors in the analog to digital conversion process. status freescale accelerometers include fault detection circuitry and a fault latch. the status pi n is an output from the fault latch, or'd with self-test, and is set high whenever one (or more) of the following events occur: ? supply voltage falls below the low voltage detect (lvd) voltage threshold ? clock oscillator falls below the clock monitor minimum frequency ? parity of the eprom bits becomes odd in number. the fault latch can be reset by a rising edge on the self-test input pin, unless one (or more) of the fault conditions continues to exist. acceleration
sensors freescale semiconductor 5 MMA3202d basic connections pinout description figure 4. soic accelerometer with recommended connection diagram pcb layout figure 5. recommended pcb layout for interfacing accelerometer to microcontroller note: ? use a 0.1 f capacitor on v dd to decouple the power source. ? physical coupling distance of the accelerometer to the microcontroller should be minimal. ? place a ground plane beneath the accelerometer to reduce noise, the ground plane should be attached to all of the open ended terminals shown in figure 5 . ? use an rc filter of 1 k ? and 0.01 f on the output of the accelerometer to minimize cl ock noise (from the switched capacitor filter circuit). ? pcb layout of power and ground should not couple power supply noise. ? accelerometer and microcontroller should not be a high current path. ? a/d sampling rate and any external power supply switching frequency should be selected such that they do not interfere with the internal acce lerometer sampling frequency. this will prevent aliasing errors. table 3. pin descriptions pin no. pin name description 1 thru 3 ? leave unconnected. 4 ? no internal connection. leave unconnected. 5 st logic input pin used to initiate self-test. 6 x out output voltage of the accelerometer. x direction. 7 status logic output pin to indicate fault. 8 v ss the power supply ground. 9 v dd the power supply input. 10 av dd power supply input (analog). 11 y out output voltage of the accelerometer. y direction. 12 thru 16 ? used for factory trim. leave unconnected. 17 thru 19 ? no internal connection. leave unconnected. 20 gnd ground. 14 15 16 17 18 19 20 8 7 6 5 4 3 2 1 13 n/c st x out status v dd gnd n/c n/c n/c n/c n/c n/c 12 10 9 11 v ss av dd n/c y out n/c n/c n/c n/c 10 x out y out MMA3202d st v dd v ss r1 1 k ? c2 0.01 f 5 9 8 logic input v dd c1 0.1 f 7 6 c3 0.01 f r2 1 k ? av dd 11 status x output signal y output signal p0 a/d in v rh v ss v dd st y out v ss v dd 0.01 f c 1 k ? 0.1 f 0.1 f power supply c r c 0.1 f p1 status a/d in x out r 0.01 f c 1 k ? microcontroller accelerometer c
sensors 6 freescale semiconductor MMA3202d dynamic acceleration sensing direction static acceleration sensing direction ? x 14 15 16 17 18 19 20 8 7 6 5 4 3 2 1 13 n/c n/c n/c st x out status v dd gnd n/c n/c n/c n/c n/c n/c n/c 12 10 9 11 v ss av dd n/c y out n/c + y + x top view 20-pin soic package n/c pins are recommended to be left floating ? y acceleration of the package in the + x and + y direction (center plates move in the ? x and ? y direction) will result in an increase in the x and y outputs. activation of self test moves the center plates in the ? x and ? y direction, resulting in an increase in the x and y outputs. 11 12 13 14 15 16 17 18 19 20 10 9 8 7 6 5 4 3 2 1 direction of earth? s gravity field.* * when positioned as shown, the earth?s gravity w ill result in a positive 1g output in the x channel. front view side view
sensors freescale semiconductor 7 MMA3202d minimum recommended footprint fo r surface mounted applications surface mount board layout is a critical portion of the total design. the footprint for the surface mount packages must be the correct size to ensure proper solder connection interface between the board and the package. with the correct footprint, the packages will self-align when subjected to a solder reflow process. it is always recommended to design boards with a solder mask layer to avoid bridging and shorting between solder pads. figure 6. footprint soic-20 (case 475a-01) 0.380 in. 9.65 mm 0.050 in. 1.27 mm 0.024 in. 0.610 mm 0.080 in. 2.03 mm
MMA3202d sensors 8 freescale semiconductor package dimensions page 1 of 2 case 475a-02 issue c 20-lead soic
package dimensions case 475a-02 issue c 20-lead soic page 2 of 2 sensors freescale semiconductor 9 MMA3202
MMA3202d rev. 5 11/2006 how to reach us: home page: www.freescale.com web support: http://www.freescale.com/support usa/europe or locations not listed: freescale semiconductor, inc. technical information center, el516 2100 east elliot road tempe, arizona 85284 +1-800-521-6274 or +1-480-768-2130 www.freescale.com/support europe, middle east, and africa: freescale halbleiter deutschland gmbh technical information center schatzbogen 7 81829 muenchen, germany +44 1296 380 456 (english) +46 8 52200080 (english) +49 89 92103 559 (german) +33 1 69 35 48 48 (french) www.freescale.com/support japan: freescale semiconductor japan ltd. headquarters arco tower 15f 1-8-1, shimo-meguro, meguro-ku, tokyo 153-0064 japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com asia/pacific: freescale semiconductor hong kong ltd. technical information center 2 dai king street tai po industrial estate tai po, n.t., hong kong +800 2666 8080 support.asia@freescale.com for literature requests only: freescale semiconductor lite rature distribution center p.o. box 5405 denver, colorado 80217 1-800-441-2447 or 303-675-2140 fax: 303-675-2150 ldcforfreescalesemiconductor@hibbertgroup.com information in this document is provided solely to enable system and software implementers to use freescale semiconduc tor products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. freescale semiconductor reserves the right to make changes without further notice to any products herein. freescale semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does freescale semiconductor assume any liability ar ising out of the application or use of any product or circuit, and specifically discl aims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters that may be provided in freescale semiconductor data s heets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals?, must be validated for each customer application by customer?s technical experts. freescale se miconductor does not convey any license under its patent rights nor the rights of others. freescale semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the fa ilure of the freescale semiconductor product could create a situation where personal injury or death may occur. should buyer purchase or use freescale semiconductor products for any such unintended or unauthorized application, buyer shall indemni fy and hold freescale semiconductor and its officers, employees, subsidiaries, affili ates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that freescale semiconductor was negligent regarding the design or manufacture of the part. freescale? and the freescale logo are trademarks of freescale semiconductor, inc. all other product or service names are the property of their respective owners. ? freescale semiconductor, inc. 2006. all rights reserved.
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